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王兴晟

作者: 时间:2018-03-26 点击数:

12B6F

姓名:王兴晟

职称:教授(湖北省百人计划入选者)

专业方向:微电子学系

个人简介:

教授(湖北省百人计划入选者)

华中科技大学光学与电子信息学院

E-mail: xswang@hust.edu.cn

办公室:武汉光电国家研究中心

教育工作简介:

2000.9-2004.7 北京工商大学,本科

2004.9-2006.9 清华大学,理学硕士,导师:胡家信

2006.10-2010.7 英国格拉斯哥大学,PhD,导师:Prof. Asen Asenov, Prof. Scott Roy

2010.3-2016.5 英国格拉斯哥大学,副研

2016.5-2018.2 新思科技,高级工程师

2018.2-至今华中科技大学,教授

研究方向:

微纳米电子器件及系统

随机涨落可变性与可靠性、表征与建模

器件与电路协同优化设计方法学

类脑计算、存储融合计算与神经网络

获奖或者荣誉:

IEEE高级会员|IEEE Senior member

湖北省第七批“百人计划”科技创新入选者|Recipient of Hubei Province 100 Talents Program

英国ORSAS入选者| Recipient of UK ORSAS

招生:

热诚欢迎具有微电子、物理、材料、数学、计算机等相关背景的学生攻读硕士和博士学位(每年4/5个左右名额),欢迎具有同类背景博士毕业生攻读博士后。

同时欢迎讲师和副教授级别申请者联系并加入研究团队。


Professor Xingsheng Wang

School of Optical and Electronic Information

Huazhong University of Science and Technology

E-mail: xswang@hust.edu.cn, Office: Wuhan National Laboratory for Optoelectronics

Education and Career

Sept/2000-July/2004, Beijing Technology and Business University, Bachelor of Engineering

Sept/2004-Sept/2006, Tsinghua University, Master of Science, Advisor: Prof. Jiaxin Hu

Oct/2006-July/2010, University of Glasgow, PhD in Electronics and Electrical Engineering, Supervisors: Prof. Asen Asenov, Prof. Scott Roy

Mar/2010-May/2016, University of Glasgow, Research Associate

May/2016-Feb/2018, Synopsys (Northern Europe), Senior Applications Engineer

Feb/2018-Present, Huazhong University of Science and Technology, Professor

Research Interest

1. Micro/nano-scale electron devices and systems

2. Random fluctuation and reliability, characterization and modelling

3. Design technology co-optimization methodology

4. Neuromorphic computing, in-memory computing, and neural network

Biography

Dr Xingsheng Wang is a Professor with School of Optical and Electronic Information at Huazhong University of Science and Technology (HUST) in Wuhan, China. He obtained PhD in Electronics and Electrical Engineering from University of Glasgow, UK, in 2010, and Master degree in Mathematics from Tsinghua University, Beijing, China in 2007 with first prize, and Bachelor degree in Electronic Science and Technology from Beijing Technology and Business University in 2004 with first prize. Before he joined HUST in Wuhan as a full professor in February 2018, he worked in University of Glasgow as Research Associate from 2010 to 2016, and in Synopsys as Senior Applications Engineer from 2016 to 2018. His research interest covers nanoscale devices and systems, statistical variability and reliability, and design technology co-optimization (DTCO), and his research explored the variability and DTCO methodology and applications. He has participated in several national/consortium projects including UK EPSRC projects, Scottish Funding Council project, and EU FP7/ENIAC/Horizon2020 projects, with the total funding of several million pounds. He has published more than 70 scientific papers in EDL, TED, APL, IEDM, VLSI, SISPAD etc, and 2 book chapters. He is the recipient of UK ORSAS, and Hubei Province 100 talents program. He is an IEEE senior member and serves as conference TPC members, the golden reviewers of such as TED, EDL.

Group Openings

The postgraduate positions are opening in our group for the students with strong background of micro/nano-electronics, physics, materials, mathematics, and computing to pursue the Master degree and PhD degree. The postdoc positions are also available in the group. We also welcome the applicants for the lecturers and associate professors to join the group.

代表性论文|Selected Publications

1.T. Al-Ameri, V. P. Georgiev, T. Sadi, Y. Wang, F. Adamu-Lema,X. Wang, S. M. Amoroso, E. Towie, A. R. Brown and A. Asenov, "Impact of Quantum Confinement on Transport and the Electrostatic Driven Performance of Silicon Nanowire Transistors at the Scaling Limit,"Solid-State Electronics, Vol. 129, pp. 73–80, Mar. 2017.

2.Y. Wang, B. Cheng,X. Wang, E. Towie, C. Riddet, A. R. Brown, S. M. Amoroso, L. Wang, D. Reid, X. Liu, J. Kang and A. Asenov, "Variability-aware TCAD Based Design-Technology Co-Optimization Platform for 7nm Node Nanowire and Beyond," inProc. Symposium on VLSI Technology Digest of Technical Papers (VLSI-Tech), Honolulu HI USA, June 13-16, 2016, pp. 174–175.

3.A. Asenov, Y. Wang, B. Cheng,X. Wang, P. Asenov, T. Al-Ameri and V. Georgiev, “Nanowire transistor solutions for 5nm and beyond,” in Proc 17thInternational Symposium on Quality Electronic Design (ISQED), Santa Clara, USA, March 15-16, 2016, pp.269-274. (邀请论文,执笔)

4.Z. Zhang, Z. Zhang, R. Wang*, X. Jiang, S. Guo, Y. Wang,X. Wang*, B. Cheng, A. Aseov and R. Huang, "New Approach for Understanding “Random Device Physics” from Channel Percolation Perspectives: Statistical Simulations, Key Factors and Experimental Results," inProc. IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, Dec. 5-7, 2016, pp. 172–175.

5.X. Jiang, S. Guo, R. Wang*,X. Wang*, B. Cheng, A. Asenov, and R. Huang, “A device-level characterization approach to quantify the impacts of different random variation sources in FinFET technology,”IEEE Electron Device Letters,Vol.37 no.8, pp.932-935, August 2016. doi:10.1109/LED.2016.2581878

6.X. Jiang, S. Guo, R. Wang, Y. Wang,X. Wang, B. Cheng, A. Asenov and R. Huang, "New Insights into the Near-Threshold Design in Nanoscale FinFET Technology for Sub-0.2V Applications," inProc. International Electron Devices Meeting (IEDM), San Francisco, CA, USA, Dec. 5-9, 2016, pp. 695–698.

7.X. Wang, B. Cheng, D. Reid, A. Pender, P. Asenov, C. Millar, and A. Asenov, “FinFET centric variability-aware compact model extraction and generation technology supporting DTCO,”IEEE Transactions on Electron Devices,vol.62 no.10, pp.3139-3146, Oct. 2015.

8.Y. Wang, T. Al-Ameri,X. Wang*, V. Georgiev, E. Towie, S. M. Amoroso, A.R. Brown, B. Cheng, D. Reid, C. Riddet, L. Shifren, S. Sinha, G. Yeric, R. Aitken, X. Liu, J. Kang, and A. Asenov*, “Simulation study of the impact of quantum confinement on the electrostatically driven performance of nanowire transistors,”IEEE Transactions on Electron Devices, vol.62 no.10, pp.3299-3236, Oct. 2015.

9.X. Jiang,X. Wang*, R. Wang*, B. Cheng, A. Asenov and R. Huang*, "Predictive Compact Modeling of Random Variations in FinFET Technology for 16/14nm Node and Beyond," inProc. IEEE International Electron Devices Meeting (IEDM), Washington DC, Dec. 7-9, 2015, p. 28.3.1–28.3.4.

10.X. Jiang, J. Wang,X. Wang*, R. Wang*, B. Cheng, A. Asenov, L. Wei*, and R. Huang, “New Assessment Methodology Based on Energy–Delay–Yield Cooptimization for Nanoscale CMOS Technology,”IEEE Transactions on Electron Devices, Vol. 62 No. 6, pp.1746-1753, June 2015.

11.A. Asenov, B. Cheng,X. Wang, A. R. Brown, C. Millar, C. Alexander, S. M. Amoroso, J. B. Kuang and S. Nassif, "Variability Aware Simulation Based Design-Technology Co-optimization (DTCO) Flow in 14 nm FinFET/SRAM Cooptimization,"IEEE Transactions on Electron Devices, Vol. 62, No. 6, pp. 1682–1690, June 2015. (邀请论文,封面论文)

12.S. M. Amoroso, V. P. Georgiev, L. Gerrer, E. Towie,X. Wang, C. Riddet, A. R. Brown and A. Asenov, "Inverse Scaling Trends for Charge-Trapping-Induced Degradation of FinFETs Performance,"IEEE Transactions on Electron Devices, Vol. 61, No. 12, pp. 4014–4018, Oct. 2014.

13.F. Adamu-Lema#,X. Wang#, S. M. Amoroso, C. Riddet, B. Cheng, L. Shifren, R. Aitken, S. Sinha, G. Yeric, A. Asenov, “Performance and variability of doped multi-threshold FinFETs for 10nm CMOS,”IEEE Transactions on Electron Devices, vol.61 no.10, pp.3372-3378, Oct. 2014.

14.X. Wang, A.R. Brown, B. Cheng, S. Roy, and A. Asenov, “Drain Bias Effects on Statistical Variability and Reliability and Related Subthreshold Variability in 20-nm Bulk Planar MOSFETs,”Solid-State Electronics. Vol.98, pp.99-105, August 2014.

15.A. Asenov, F. Adamu-Lema,X. Wangand S. M. Amoroso, "Problems with the continuous doping TCAD simulations of decananometer CMOS transistors,"IEEE Transactions on Electron Devices, Vol. 61, No. 8, pp. 2745–2751, Aug. 2014.

16.A. Asenov, B. Cheng,X. Wang, A. R. Brown, D. Reid, C. Millar and C. L. Alexander, "Simulation Based Transistor-SRAM Co-Design in the Presence of Statistical Variability and Reliability," inProc. IEEE International Electron Devices Meeting (IEDM), Washington DC, Dec. 9-11, 2013, pp. 818–821. (邀请论文)

17.X. Wang, B. Cheng, A.R. Brown, C. Millar, J.B. Kuang, S. Nassif, A. Asenov, “Statistical Variability and Reliability and the Impact on Corresponding 6T-SRAM Cell Design for a 14-nm node SOI FinFET Technology,”IEEE Design & Test,vol.30 no.6, pp.18-28, December 2013. (邀请论文)

18.X. Wang, B. Cheng, A. R. Brown, C. Millar, J. B. Kuang, S. Nassif, and A. Asenov, “Interplay Between Process-Induced and Statistical Variability in 14-nm CMOS technology Double-Gate SOI FinFETs,”IEEE Transactions on Electron Devices, Vol.60 No.8, pp.2485-2492, August 2013.

19.X. Wang, F. Adamu-Lema, B. Cheng, and A. Asenov, “Geometry, Temperature and Body Bias Dependence of Statistical Variability of 22-nm Bulk CMOS Technology: A Comprehensive Simulation Analysis,”IEEE Transactions on Electron Devices, Vol.60 No.5, pp.1547-1554, May 2013.

20.X. Wang, G. Roy, O. Saxod, A. Bajolet, A. Juge, and A. Asenov, “Simulation Study of Dominant Statistical Variability Sources in 32-nm High-k/Metal Gate CMOS,”IEEE Electron Device Letters, Vol.33, No.5, pp.643-645, May 2012.

21.K. Abid,X. Wang, A. Z. Khokhar, S. Watson, S. Al-Hasani and F. Rahman, "Electrically tuneable spectral responsivity in gated silicon photodiodes,"Applied Physics Letters, Vol. 99, No. 23, p. 231104, Dec. 2011.

22.B. Benbakhti, K. Chan, E. Towie, K. Kalna, C. Riddet,X. Wang, G. Eneman, G. Hellings, K. De Meyer, M. Meuris and A. Asenov, "Numerical analysis of the new Implant-Free Quantum-Well CMOS: DualLogic approach,"Solid-State Electronics, Vol. 63, No. 1, pp. 14–18, Sept. 2011.

23.S. Markov,X. Wang, N. Moezi and A. Asenov, "Drain Current Collapse in Nanoscaled Bulk MOSFETs Due to Random Dopant Compensation in the Source/Drain Extensions,"IEEE Transactions on Electron Devices, Vol. 58, No. 8, pp. 2385–2393, Aug. 2011.

24.X. Wang, S. Roy, A. R. Brown and A. Asenov, "Impact of STI on Statistical Variability and Reliability of Decananometer MOSFETs,"IEEE Electron Device Letters, Vol. 32, No. 4, pp. 479–481, Apr. 2011.

25.X. Wang, A. R. Brown, N. M. Idris, S. Markov, G. Roy and A. Asenov, "Statistical Threshold-Voltage Variability in Scaled Decananometer Bulk HKMG MOSFETs: A Full-Scale 3-D Simulation Scaling Study,"IEEE Transactions on Electron Devices, Vol. 58, No. 8, pp. 2293–2301, Aug. 2011. (封面论文)

26.X. Wang, A. R. Brown, B. Cheng and A. Asenov, "Statistical Variability and Reliability in Nanoscale FinFETs," inProc.IEEE International Electron Devices Meeting (IEDM), Washington DC, Dec. 5-7, 2011, pp. 103–106.

27.B. Bindu, B. Cheng, G. Roy,X. Wang, S. Roy and A. Asenov, "Parameter set and data sampling strategy for accurate yet efficient statistical MOSFET compact model extraction,"Solid-State Electronics, Vol. 54, No. 3, pp. 307–315, Mar. 2010.

28.B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy,X. Wang, S. Roy and A. Asenov, "Statistical Variability Compact Modeling Strategies for BSIM4 and PSP,"IEEE Design and Test of Computers, Vol. 27, No. 2, pp. 26–35, Mar./Apr. 2010.

29.A. Asenov, S. Roy, A. R. Brown, G. Roy, C. L. Alexander, C. Riddet, C. Millar, B. Cheng, A. Martinez, N. Seoane, D. Reid, M. Faiz. Bukhori,X. Wangand U. Kovac, "Advanced simulation of statistical variability and reliability in nano CMOS transistors," inProc.IEEE International Electron Devices Meeting (IEDM), USA, Dec. 2008, p. 421.(邀请论文)

专著章节|Book Chapters

1.X. Wang*, V. P. Georgiev, F. Adamu-Lema, L. Gerrer, S. M. Amoroso, and A. Asenov, "Chapter 6 TCAD-based design technology co-optimization for variability in nanoscale SOI FinFETs," inIntegrated Nanodevice and Nanosystem Fabrication: Materials, Techniques, and New Opportunities, 1st ed., S. Deleonibus, Ed. Pan Stanford Publishing, 2017, pp.215-252.

2.A. Asenov, B. Cheng, A. R. Brown andX. Wang, "Chapter 15 Impact of Statistical Variability on FinFET Technology: From Device, Statistical Compact Modelling to Statistical Circuit Simulation," inNyquist AD Converters, Sensor Interfaces, and Robustness, A. H. M. van Roermund, A. Baschirotto and M. Steyaert, Eds. New York: Springer, 2013, pp. 281–291.

(详细参考google scholar citations)

封面|Cover:




A276


华中科技大学  光学与电子信息学院  联系电话:027-87558726  邮编:430074 地址:中国•湖北省武汉市珞喻路1037号 华中科技大学南五楼六楼